The present invention concerns the field of testing integrated circuits and pertains particularly to testing hot carrier induced degradation to fall and rise time of CMOS inverter circuits.
Testing is an integral part in the designing and manufacturing devices such as integrated circuits. In addition to testing of integrated circuits under normal operating conditions, it is also desirable to test integrated circuits after they have undergone stress conditions. For example, performance of integrated circuits can be degraded by hot carrier stress. See for example, Khandker N. Quander, Ping K. Co, and Chenming Hu, Projecting CMOS Circuit Hot-Carrier Reliability from DC Device Lifetime, IEDM 93, 1993, pp. 511; and Chun Jiang and Eric Johnson, AC Hot-Carrier Degradation in a Voltage Controlled Oscillator, IRPS 1993, p. 53. It is desirable to be able to accurately measure the effect on performance of integrated circuits resulting from hot carrier stress.